106.25 MHz CMOS clocking in a 7×5 mm MEMS XO
The ASVMPC-106.250MHZ-LY-T3 is a MEMS-based standard crystal oscillator delivering a 106.25 MHz CMOS output — a frequency that sits squarely in the clock-tree sweet spot for Ethernet PHYs, USB host controllers, and PCIe reference paths where a clean CMOS square wave at this speed feeds the PLL directly. CMOS output means the driver swings rail-to-rail into a logic input; the 35 mA max supply current accounts for the output stage charging the trace capacitance at each toggle. The Enable/Disable pin lets the system drop the oscillator from 35 mA down to 22 mA max — the 13 mA gap is the output stage power, so a sleeping peripheral that gates this signal saves real current on a battery-hosted node.
Supply rails and power budget
The current spec is stated at max; the actual draw scales with frequency and load capacitance, so budget 35 mA as the rail peak at 106.25 MHz and ensure the source can supply that inrush on power-up without sagging the rail enough to glitch the downstream logic. At -40°C to 85°C this is an industrial temperature grade — the MEMS resonator does not drift the way a traditional quartz crystal does across temperature, but the CMOS output driver threshold does shift. For a design that will see 85°C ambient inside a sealed enclosure, confirm the receiving logic input has sufficient noise margin at the elevated temperature; a 3.3 V CMOS input with a 0.7×VDD Vil threshold still passes comfortably at the upper end of the range.
Package footprint and exposed paddle
The exposed paddle under the package is the ground and thermal return — it must be soldered to the board pad with a thermal via pattern to the ground plane; an unsoldered paddle lifts the impedance of the ground reference at these frequencies and introduces jitter. The no-lead format also means the lead inspection lands are hidden under the body, so the solder joint quality relies on reflow profile control rather than visual inspection of the fillet.