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Abracon LLC ASVMB-133.333MHZ-XY-T — Crystals & Oscillators

Abracon ASVMB-133.333MHZ-XY-T XO Oscillator, 133.333 MHz

MPNASVMB-133.333MHZ-XY-T
Active

Abracon LLC ASVMB-133.333MHZ-XY-T, MEMS XO (Standard), LVCMOS output, 133.333 MHz, ±10ppm, 1.8–3.3 V, -40°C~105°C, 4-SMD exposed pad, 7.00mm x 5.00mm, standby function.

$4.2800Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

ASVMB-133.333MHZ-XY-T specifications
ParameterValue
TypeXO (Standard)
SeriesASVMB, Pure Silicon™
MountingSurface Mount
Supply voltage1.8V ~ 3.3V
Current - supply16mA
Current - supply (Disable)15µA
Frequency133.333 MHz
Frequency stability±10ppm
Operating temperature-40°C~105°C
Size (Dimension)0.276\" L x 0.197\" W (7.00mm x 5.00mm)
Height - seated0.035\" (0.90mm)
OutputLVCMOS
PackageTape & Reel (TR); Cut Tape (CT)
FunctionStandby (Power Down)
Base resonatorMEMS
Case4-SMD, No Lead Exposed Pad

Product details

133.333 MHz LVCMOS clock from a Pure Silicon MEMS resonator

The ASVMB-133.333MHZ-XY-T is a standard XO from Abracon's Pure Silicon series — it uses a MEMS resonator rather than a traditional quartz crystal, which eliminates the mechanical fragility of crystal blanks and gives tighter initial tolerance over temperature. The output is LVCMOS, the default logic standard for most MCUs, SoCs, and FPGAs — the 133.333 MHz frequency is a common reference clock for Ethernet PHY, USB-PHY, and PCIe-adjacent SerDes stages, so this part sits behind a lot of connectivity silicon without needing a level translator. Frequency stability of ±10ppm keeps accumulated clock error below the typical USB 500 ppm budget for a full day of operation, and well within the ±50 ppm window that most telecom PHY clocks require as a system-level allocation.

Voltage flexibility and power budget for battery and wired designs

A single LDO that already supplies the digital core can feed this oscillator directly. Active supply current peaks at 16 mA; in standby (power-down mode) it drops to 15 µA. The 1,000× ratio means a battery-powered design can park the clock in standby between transmission bursts and recover timing within the MEMS startup spec without draining the rail continuously.

Package and thermal profile for board-level layout

The exposed paddle under the device is the primary thermal and ground reference path — it should be soldered to the PCB land, not left floating, to achieve the datasheet frequency stability specification. A junction temperature analysis is still required if the device is located near a hot regulator or processor.

Frequently asked questions

What output type does the ASVMB-133.333MHZ-XY-T deliver?

It is an LVCMOS oscillator, the standard single-ended logic level used by the majority of MCU, SoC, and FPGA clock inputs. No external termination is required on the source side; the LVCMOS driver drives the line to the rail.