Dual NAND gate in a tight 8-pin SSOP
The TC7W00FK,LF is a dual 2-input NAND gate from Toshiba's TC7W series, packing two independent gates into an 8-VFSOP package that measures 2.30 mm wide — the 8-SSOP footprint fits into dense mixed-signal boards where board real estate is the bottleneck. Quiescent current maxes out at 1 µA — negligible in battery-powered logic where every microamp counts.
Propagation delay and drive capability
Max propagation delay is 13 ns at 6V with a 50 pF load — that's the worst-case figure across temperature and voltage. At 5V the delay tightens; for timing-sensitive paths, budget the 13 ns ceiling and check the actual load capacitance on the trace. Output drive is symmetric at 5.2 mA source and sink — enough to switch a downstream CMOS gate input or a low-power LED indicator, but not enough to drive a relay coil or a long bus without a buffer. Logic thresholds are specified as input-low at 0.5V to 1.8V and input-high at 1.5V to 4.2V across the 2V-6V supply range — the overlap region (1.5V to 1.8V) is the undefined zone; keep input rise/fall times fast enough to avoid oscillation there.
Package, temperature grade, and compliance
Housed in an 8-VFSOP (0.091" body width, 2.30 mm) with supplier device package designation 8-SSOP. Surface-mount only — the fine-pitch leads need a hot-air rework station with a fine nozzle; a standard soldering iron tip is too wide for the pad spacing.