Texas Instruments TPS73515DRBT — Power Management (PMIC / Gate Driver)
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Texas Instruments / Power Management (PMIC / Gate Driver)

TPS73515DRBT LDO 1.5V 500mA, 8-SON

MPN TPS73515DRBT
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Texas Instruments TPS73515DRBT LDO linear regulator, fixed 1.5V output, 500mA, 8-VDFN exposed pad (3x3 SON), -40°C to 125°C, active production.

In Stock: 405 pcs
MOQ: 1 pcs
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[SPEC] Essential Parameters Snapshot Full Specifications (15)
Package / Case 8-VDFN Exposed Pad

Full Technical Specifications

15 Parameters
TPS73515DRBT specifications
Parameter / AttributeSpecification / Value
Output typeFixed
MountingSurface Mount
Voltage - input6.5V
Voltage dropout0.5V @ 500mA
Voltage - output (Min (Fixed))1.5V
Output current500mA
Current - quiescent65 µA
Operating temperature-40°C ~ 125°C
PSRR66dB ~ 22dB (100Hz ~ 100kHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case8-VDFN Exposed Pad
Control featuresEnable
Protection featuresOver Current, Over Temperature, Reverse Polarity, Under Voltage Lockout (UVLO)
Number of regulators1
Output configurationPositive
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Technical Details & Description

Key parametrics for the rail

The TPS73515DRBT: This is a single-output positive LDO with a fixed 1.5 V output and a maximum output current of 500 mA — sized for powering low-voltage digital cores or analog front-ends that need a clean 1.5 V rail. Quiescent current is 65 µA typical, which keeps the regulator's own draw low in always-on or battery-backed applications.

PSRR profile and noise-sensitive loads

Power supply rejection ratio (PSRR) is 66 dB at 100 Hz, rolling off to 22 dB at 100 kHz — this profile means the regulator attenuates low-frequency ripple (e.g., 100/120 Hz from a rectified mains supply) by a factor of ~2000, but passes higher-frequency switching noise with less rejection. For a noise-sensitive analog rail (e.g., an ADC reference or VCO supply), the PSRR at the switching frequency of the upstream converter determines whether additional post-filtering is needed.

Package and thermal pad

Surface-mount assembly; the tape-and-reel option suits automated pick-and-place lines.

Protection and control

Built-in protection includes over-current, over-temperature, reverse polarity, and under-voltage lockout (UVLO) — the UVLO prevents the output from turning on until the input rail is high enough to maintain regulation. An enable pin allows the output to be gated by a logic signal, useful for sequencing multiple rails or shutting down the regulator in sleep modes.

Frequently asked questions

What is the PSRR of TPS73515DRBT?

PSRR is 66 dB at 100 Hz, rolling off to 22 dB at 100 kHz. This means the LDO strongly attenuates low-frequency ripple but provides less rejection at higher switching frequencies.

What package does TPS73515DRBT use?

It comes in an 8-VDFN exposed pad package (8-SON, 3x3 mm).

TPS73515DRBT
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