Skip to main content
THS4131ID

THS4131ID Differential Op-Amp, 225 MHz GBW, 52 V/µs, 8-SOIC

MPNTHS4131ID
End of Life

Texas Instruments THS4131ID differential amplifier, single circuit, 225 MHz gain bandwidth, 52 V/µs slew rate, 150 MHz -3dB bandwidth, 8-SOIC surface-mount package, tube.

$10.45Ref. price · indicative, final on quote
Packaging8-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

THS4131ID specifications
ParameterValue
Output typeDifferential
MountingSurface Mount
Amplifier typeDifferential
Voltage - input offset200 µV
Voltage - supply span33 V
Current - supply12.3mA
Current - input bias2 µA
Current - output (Channel)85 mA
Operating temperature-40°C ~ 85°C
-3db bandwidth150 MHz
Gain bandwidth product225 MHz
PackageTube
Slew rate52V/µs
Case8-SOIC (0.154\", 3.90mm Width)
Number of circuits1

Product details

Differential amplifier with 225 MHz GBW and 52 V/µs slew rate

The THS4131ID is a single-circuit differential amplifier from Texas Instruments, delivering a gain bandwidth product of 225 MHz and a -3 dB bandwidth of 150 MHz, with a slew rate of 52 V/µs. The differential output type means it directly drives ADC inputs or twisted-pair lines without extra conversion — the output is the difference between the two output pins, rejecting common-mode noise from the supply or ground bounce.

Supply, temperature, and package fit

Operating from a 4 V to 33 V supply span, the THS4131ID covers single-supply 5 V rails up to ±15 V bipolar supplies, with an industrial temperature range of -40°C to 85°C. Housed in an 8-SOIC (0.154", 3.90 mm width) surface-mount package, the footprint matches the standard SOIC-8 land pattern — no special pad geometry or thermal vias required for most signal-chain applications. The 12.3 mA supply current and 85 mA output current per channel give a clear power budget: at ±5 V rails, the quiescent dissipation is about 123 mW, leaving headroom for driving 50-ohm or 75-ohm loads in video or communications interfaces.

Input offset and bias — what they mean for precision

Input offset voltage is 200 µV typical — for a gain of 10, this contributes 2 mV of DC error at the output, negligible for most AC-coupled or high-speed paths but worth budgeting in a DC-accurate front-end. Input bias current is 2 µA typical, which is higher than a JFET or CMOS op-amp — if the source impedance exceeds a few kilo-ohms, the bias current drop across the source resistor adds a DC offset that must be nulled or matched.