Dual inverter with open-drain outputs — 10.5 ns at 3.3 V
The SN74AUP2G06DCKR is a dual inverter from TI's 74AUP low-power logic family, with open-drain outputs that let you wire-AND multiple outputs on a shared pull-up rail — useful for interrupt lines or bus arbitration where any low signal pulls the line low. Quiescent current maxes at 500 nA, so it fits battery-powered or always-on domains where every microamp counts. Propagation delay is 10.5 ns max at 3.3 V with a 30 pF load — fast enough for most general-purpose signal conditioning and level translation below 50 MHz.
Housed in a 6-pin SC-70-6 (also known as 6-TSSOP, SC-88, or SOT-363), the package body is roughly 2.0 mm × 2.1 mm with a 0.65 mm pin pitch. Surface-mount only — no through-hole variant.
The 74AUP family is widely second-sourced across the industry, but TI's own datasheet is the definitive reference for timing and drive characteristics.
