1.755 Gbps deserializer in the FlatLink™ family
The SN65LVDS302ZXHR is a programmable 27-bit display deserializer from the Texas Instruments FlatLink™ series, accepting three LVDS or CMOS serial inputs and deserializing to 24 parallel CMOS outputs at a data rate of 1.755 Gbps.
3:24 deserializer — what the channel count means for fit
Three serial inputs (each LVDS or CMOS) feed a deserializer that outputs 24 parallel CMOS signals — a 3:24 ratio that maps directly to a 24-bit RGB or control bus in a display interface, so the BOM position count matches the number of parallel data lines the panel or controller expects.
80-NFBGA footprint and supply rails
The 80-NFBGA (5x5 mm) ball grid array requires a 4-layer or better PCB for fan-out of the 80 balls; the 1.65 V to 1.95 V supply rail is a single 1.8 V nominal plane, simplifying the power-tree design.
