Signal-conditioning fit: 2 Gbps through a 470 ps gate
The SN65LVDS100DGK is a single-channel buffer/reDriver that accepts CML, LVDS, or LVPECL inputs and reconditions them to LVDS output at up to 2 Gbps. The 470 ps propagation delay sets the timing budget for the link — at 2 Gbps the bit period is 500 ps, so this part adds just under one bit-time of latency, which matters for closed-loop timing in backplane or cable-equalization paths.
Where it lands: board and environment
Housed in an 8-VSSOP (3.00 mm × 3.00 mm body, 0.65 mm pitch), this is a surface-mount part that fits on a standard 2-layer board with basic fan-out.