Jitter cleaner for high-speed clock trees
The Texas Instruments LMK04228NKDT is a PLL-based jitter cleaner clocking IC designed to reduce phase noise on reference clocks for ADCs, DACs, FPGAs, and RF transceivers. It accepts LVCMOS, LVDS, or LVPECL inputs and delivers the same output types across a 3:15 input-to-output ratio — three inputs feeding up to fifteen clock outputs. The single PLL core runs to 3.08 GHz, making it suitable for cleaning clocks in 10G+ Ethernet, wireless base-station, and instrumentation backplanes where jitter budgets are tight.
The 3.08 GHz maximum frequency covers the fundamental clock rates for most high-speed serial links and RF sampling converters. The PLL's jitter-cleaning loop filter attenuates wideband phase noise from the reference source. The 3:15 fan-out lets a single cleaned clock drive multiple converters or FPGAs without external fanout buffers.