Clock distribution and signal translation in a single 32-WQFN package
It handles up to 200 MHz on the output side, with a 3:10 input-to-output ratio — three selectable input sources fan out to ten outputs, giving you flexibility to route multiple clock domains from a single device. The supply range spans 2.375V to 3.45V, so it sits comfortably on a 2.5V or 3.3V rail without an extra regulator.
Industrial temperature rating and package reality
The input side is differential-capable (Yes/No flag means the differential inputs are accepted but the outputs are single-ended LVCMOS/LVTTL), so you can feed it a clean LVPECL or LVDS clock from a high-end oscillator and get standard CMOS levels out to the downstream logic.