It uses a String DAC architecture and communicates over SPI or DSP serial interfaces.
Output type and settling — loop design constraints
Because the output is current-buffered (not voltage), the DAC drives loads like a current loop or a resistor to ground. The 25 µs settling time is typical for a 12-bit step; that translates to a maximum update rate around 40 kHz if you wait for full settling. For slower loops — say a 10 Hz PID update in a temperature controller — this is more than adequate. For audio or waveform generation above a few kilohertz, you would look at a voltage-output DAC with sub-microsecond settling.