PLL clock generator with 230 MHz output and 1:5 fanout
The Texas Instruments CDCE925PWR is a PLL-based clock generator that accepts an LVCMOS or crystal input and delivers up to five LVCMOS outputs at frequencies up to 230 MHz. The integrated PLL includes a bypass mode, letting you switch between a synthesized clock and a clean reference path without external muxing. The 1:5 input-to-output ratio means a single reference clock can feed multiple downstream devices — useful for synchronising FPGAs, ADCs, or Ethernet PHYs from one source.
The part operates from a 1.7 V to 1.9 V supply, which maps to a nominal 1.8 V rail. That narrow window means the power supply needs to be tight — a 1.8 V LDO with ±2% tolerance keeps you inside the range.