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Texas Instruments CD4027BPW — Analog & Data Acquisition

TI CD4027BPW JK Flip-Flop, 24 MHz, 16-TSSOP, -55 to 125°C

MPNCD4027BPW
End of Life

Texas Instruments 4000B series JK flip-flop, CD4027BPW, dual 1-bit, positive-edge triggered, complementary outputs, 16-TSSOP, 3V to 18V supply, 24 MHz clock, -55°C to 125°C.

$1.09Ref. price · indicative, final on quote
Packaging16-TSSOP (0.173", 4.40mm Width)
RoHSROHS3 Compliant
Series4000B
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CD4027BPW specifications
ParameterValue
TypeJK Type
Series4000B
Output typeComplementary
Trigger typePositive Edge
MountingSurface Mount
Supply voltage3V ~ 18V
Current - quiescent4 µA
Current - output high, low6.8mA, 6.8mA
Clock frequency24 MHz
Operating temperature-55°C ~ 125°C (TA)
PackageTube
FunctionSet(Preset) and Reset
Case16-TSSOP (0.173\", 4.40mm Width)
Input capacitance5 pF
Number of elements2
Number of bits per element1
Max propagation delay @ v, max CL90ns @ 15V, 50pF

Product details

Dual JK flip-flop for wide-supply, wide-temp logic

The CD4027BPW is a dual JK flip-flop from the 4000B series, each element providing a single bit with complementary outputs. Positive-edge triggered with set and reset functions, it operates across a 3V to 18V supply range — a flexibility that lets it bridge legacy 5V logic and newer 3.3V rails without a level translator on the power pin. The -55°C to 125°C operating range covers military and industrial temperature grades, so this part suits avionics, downhole instrumentation, and outdoor telecom backplanes where the ambient swings beyond the commercial 0-70°C envelope.

Clock speed, propagation delay, and output drive

Rated at 24 MHz maximum clock frequency, the CD4027BPW handles moderate-speed counters, shift registers, and state machines. Output drive capability is 6.8 mA source and sink at rated conditions, enough to drive a standard CMOS load or a single TTL gate input. The 4 µA typical quiescent current keeps the static power draw negligible in battery-powered or always-on logic blocks. Input capacitance is 5 pF per pin, a figure that matters when calculating the drive strength needed from the upstream stage at 24 MHz — the dynamic power scales as C × V² × f, so a 5 pF load at 18V and 24 MHz draws about 39 µW per input.

The supplier device package matches the 16-TSSOP, so the land pattern is the same across TI's 4000B and 74HC series in this package — a single PCB footprint can serve multiple BOM variants. Supplied in tube packaging, the CD4027BPW is suited for hand-assembly or low-volume pick-and-place. For reel quantities, check the alternate order codes in the 4000B family.

Lifecycle and compliance

No single-source risk — the 4000B family has multiple qualified foundries.