Texas Instruments ADC128S022CIMT/NOPB — Analog & Data Acquisition
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Texas Instruments / Analog & Data Acquisition

TI ADC128S022CIMT/NOPB 12-Bit SAR ADC, 200k SPS

MPN ADC128S022CIMT/NOPB
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Texas Instruments ADC128S022CIMT/NOPB 12-bit SAR ADC, 200k SPS, 8-channel single-ended, SPI/DSP interface, 16-TSSOP, Tube.

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[SPEC] Essential Parameters Snapshot Full Specifications (16)
Package / Case 16-TSSOP (0.173", 4.40mm Width)
Supply Voltage 2.7V ~ 5.25V

Full Technical Specifications

16 Parameters
ADC128S022CIMT/NOPB specifications
Parameter / AttributeSpecification / Value
Input typeSingle Ended
MountingSurface Mount
Reference typeSupply
Voltage - supply, analog2.7V ~ 5.25V
Voltage - supply, digital2.7V ~ 5.25V
I/O channels8
Data interfaceSPI, DSP
Operating temperature-40°C ~ 105°C
PackageTube
ArchitectureSAR
ConfigurationMUX-S/H-ADC
Number of bits12
Case16-TSSOP (0.173\", 4.40mm Width)
Ratio - s (H:ADC)1:1
Number of a (D converters)1
Sampling rate (Per second)200k
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Technical Details & Description

12-bit SAR ADC with 8-channel multiplexer — 200k SPS throughput

The Texas Instruments ADC128S022CIMT/NOPB is a 12-bit successive-approximation-register (SAR) ADC with an integrated 8-channel multiplexer and sample-and-hold, sampling at 200k samples per second. The SAR architecture delivers a deterministic conversion time with no pipeline delay — every sample is ready one clock cycle after the start bit, making it predictable for real-time control loops. The 8 single-ended inputs let one ADC serve up to eight analog channels — think thermistor strings, potentiometer banks, or multi-sensor analog front-ends — without an external mux. The internal MUX-S/H-ADC configuration means the sample-and-hold capacitor shares the mux output, so channel-to-channel skew is limited to the mux settling time, not the ADC acquisition time.

Supply flexibility and interface — single-rail operation, SPI or DSP

No external reference IC is needed, which saves board area and BOM cost, but the ADC's accuracy tracks the supply tolerance: a 1 % supply ripple translates directly into a 1 % gain error. The data interface supports SPI or DSP-compatible framing — a 4-wire SPI bus (SCLK, CS, DOUT, DIN) or a 3-wire DSP mode where the chip select doubles as the frame sync.

The SAR architecture is inherently monotonic over temperature — no missing codes at the endpoints — so the resolution stays valid across the full range.

Frequently asked questions

What is the sampling rate and resolution of ADC128S022CIMT/NOPB?

200k samples per second at 12-bit resolution. The SAR architecture gives a deterministic conversion time — no pipeline delay.

Does ADC128S022CIMT/NOPB replace ADS1285IRHBT?

No — the ADS1285IRHBT is a 32-bit sigma-delta ADC with differential inputs and an external reference, while this part is a 12-bit SAR with single-ended inputs and supply-derived reference. They are not functional equivalents and differ in architecture, resolution, input type, and interface.

What package does ADC128S022CIMT/NOPB come in?

16-TSSOP (4.40 mm width) supplied in a Tube. The surface-mount package is suitable for standard reflow assembly.

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