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STMicroelectronics M24256-DRMN3TP/K — DC-DC Power Modules

M24256-DRMN3TP/K STMicroelectronics 256Kbit I²C EEPROM

MPNM24256-DRMN3TP/K
End of Life

STMicroelectronics M24256-DRMN3TP/K, Automotive AEC-Q100, 256Kbit I²C EEPROM, 1 MHz clock, 450 ns access, 1.8V-5.5V supply, -40°C to 125°C, 8-SOIC.

$1.71Ref. price · indicative, final on quote
Packaging8-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
SeriesAutomotive, AEC-Q100
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

M24256-DRMN3TP/K specifications
ParameterValue
SeriesAutomotive, AEC-Q100
Memory typeNon-Volatile
MountingSurface Mount
Voltage1.8V ~ 5.5V
Frequency1 MHz
Memory interfaceI²C
Operating temperature-40°C ~ 125°C (TA)
PackageTape & Reel (TR); Cut Tape (CT)
TechnologyEEPROM
Access time450 ns
Memory size256Kbit
Memory formatEEPROM
Case8-SOIC (0.154\", 3.90mm Width)
Memory organization32K x 8
Write cycle time - word, page5ms

Product details

256 Kbit I²C EEPROM for automotive and industrial buses

The STMicroelectronics M24256-DRMN3TP/K is a 256 Kbit serial EEPROM organized as 32K x 8 bits, accessed over an I²C bus at up to 1 MHz. It is part of the Automotive, AEC-Q100 series, qualified for use in vehicle electronics and other harsh environments. The wide supply range of 1.8V to 5.5V means it can sit on a legacy 5V CAN bus or a modern 3.3V/1.8V microcontroller rail without a level translator.

The 450 ns access time is the time from the I²C slave address match to the first data bit being available on SDA. At a 1 MHz clock (1 µs period), the master must stretch SCL low long enough for the EEPROM to respond. In practice, this means the bus master's I²C peripheral needs to support clock stretching or insert a wait state after the address byte. If your MCU's I²C block does not handle stretching automatically, you may see a NACK on the first read byte unless you pad the timing in firmware.

Write-cycle timing for production programming

The write cycle time is 5 ms per page or word. For a 256 Kbit device, that means writing the full array in page mode (typically 64-byte pages) takes about 2.5 seconds if you poll the acknowledge polling after each page write. In a production programming jig, this sets the floor for throughput — you cannot gang-program faster than the write cycle allows without risking incomplete writes.

The part comes in an 8-SOIC package (3.90 mm body width, 0.154" pitch), surface-mount only. The shipping options include Tape & Reel and Cut Tape, so it fits both automated pick-and-place lines and prototype hand-assembly.

It is ROHS3 compliant.

Frequently asked questions

Is M24256-DRMN3TP/K AEC-Q100 qualified?

Yes, the M24256-DRMN3TP/K is part of the Automotive, AEC-Q100 series, meaning it is qualified for automotive-grade applications per the AEC-Q100 stress test qualification for integrated circuits.

What is the equivalent part for M24256-DRMN3TP/K?

A lower-density sibling in the same automotive series is the M24C64-DRMN3TP/K, which offers 64 Kbit (8K x 8) in the same 8-SOIC package with the same 450 ns access time and 1 MHz I²C interface. It is a drop-in replacement if your application needs less storage.