Flash and RAM budget — what fits before the linker cries
The R7F100GPG3CFB#AA0: 128 KB flash (128K x 8) holds the application code, the RL78/G23 HAL, and the bootloader without squeezing. The 16 KB RAM (16K x 8) is the tight spot — a full TCP/IP stack with a 1.5 KB MTU buffer leaves about 6 KB for the application heap and stack. Plan the linker sections so the.bss and.data fit within the 16 KB ceiling; the data flash EEPROM (8 KB) is separate and does not consume RAM. The 8 KB data flash is wear-leveled by the RL78/G23 hardware — no software wear-leveling needed for up to 100,000 write cycles per sector. Calibration constants, boot counters, and production serial numbers live here without an external EEPROM.
Supply rail and temperature — one rail from a Li-ion to a 5 V bus
A 100 nF ceramic at each VDD pin plus a 10 µF bulk cap on the main rail is the standard decoupling; the 100-LQFP has 12 power/ground pins, so the IR drop across the package is low.
Peripheral mux and I/O count — 88 pins that can be anything
88 I/O pins in the 100-LQFP — the remaining 12 pins are power, ground, and the reset line. The RL78/G23 serial array unit (SAU) lets you map CSI, I²C, LINbus, SPI, or UART/USART to any of the general-purpose I/O pins; there is no fixed peripheral pin assignment. The capacitive touch unit runs independently of the CPU and supports up to 36 channels — no external touch controller for a membrane keypad. The 20-channel 10-bit ADC scans fast at up to 1 MHz conversion rate; the 8-channel 12-bit ADC delivers 1 LSB INL for precision analog inputs like thermistor bridges or current-sense amplifiers. The 2-channel 8-bit DAC outputs a reference voltage or an analog signal for external sensor excitation.