NXP Semiconductors 74HC30DB,118 — Analog & Data Acquisition
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NXP Semiconductors / Analog & Data Acquisition

NXP 74HC30DB,118 8-Input NAND Gate, 14-SSOP, 2-6V

MPN 74HC30DB,118
End of Life Spot Stock · 24-48h Dispatch 100% Original Sealed

NXP Semiconductors 74HC series NAND Gate, 74HC30DB,118, 8-input, single circuit, 14-SSOP package, 2V to 6V supply, -40°C to 125°C.

In Stock: 4,000 pcs
MOQ: 5 pcs
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$0.16 / ea · total $0.80

4,000 in stock — maximum per order · MOQ 5 · 3–4 days lead time

$0.14 / ea from 10 pcs

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[SPEC] Essential Parameters Snapshot Full Specifications (14)
Package / Case 14-SSOP (0.209", 5.30mm Width)
Supply Voltage 2V ~ 6V
Output / Current 5.2mA, 5.2mA

Full Technical Specifications

14 Parameters
74HC30DB,118 specifications
Parameter / AttributeSpecification / Value
Series74HC
Logic typeNAND Gate
MountingSurface Mount
Supply voltage2V ~ 6V
Current - quiescent2 µA
Current - output high, low5.2mA, 5.2mA
I/O channels8
Operating temperature-40°C ~ 125°C
PackageBulk
Case14-SSOP (0.209\", 5.30mm Width)
Number of circuits1
Input logic level - low0.5V ~ 1.8V
Input logic level - high1.2V ~ 3.2V
Max propagation delay @ v, max CL22ns @ 6V, 50pF
Series Sibling Variants

NXP Semiconductors 74HC Series Models

Sibling variants, package options, and speed/density grades in this NXP Semiconductors semiconductor series. Active Shenzhen warehouse allocation and rapid 24-48h dispatch.

Technical Details & Description

8-input NAND in the 74HC family

The 74HC30DB,118 is a single 8-input NAND gate from NXP's 74HC series, packaged in a 14-SSOP (0.209", 5.30mm width) for surface-mount assembly. It implements the logic function Y = /(A·B·C·D·E·F·G·H) — all eight inputs must be high for the output to go low.

Quiescent current maxes at 2 µA, so the gate adds negligible static draw in battery-backed or always-on circuits. Output drive is 5.2 mA source and sink — enough to switch a downstream CMOS input or a low-current LED indicator, but not a relay coil without a buffer.

Propagation delay and timing margin

Maximum propagation delay is 22 ns at 6V supply with a 50 pF load. At 5V the delay is typically a few nanoseconds longer; budget 25-30 ns for worst-case timing closure in a 5V system. This sets the data rate ceiling — the gate toggles cleanly at 10-15 MHz, adequate for address decoding, clock gating, or status polling in a microcontroller-based design.

Frequently asked questions

Is 74HC30DB,118 lead-free?

Yes — it is ROHS3 compliant, meaning no restricted substances including lead, mercury, cadmium, and the six phthalates.

What is the pinout of 74HC30DB,118?

The 14-SSOP package follows the standard 74HC30 pinout: inputs A-H on pins 1-9 (with GND on pin 7), output Y on pin 8, and VCC on pin 14. The pin diagram is in the NXP datasheet.

74HC30DB,118
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