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Micron Technology MT58L64L18PT-7.5 — Memory (DRAM / SRAM / Flash / EEPROM)
Micron Technology

Micron MT58L64L18PT-7.5 SRAM, 1 Mbit 64Kx18, 4.2 ns

MPNMT58L64L18PT-7.5
Active

Micron SYNCBURST™ SRAM, 1 Mbit, 64K x 18 organization, 4.2 ns access time, 133 MHz clock, 3.135 V supply, parallel interface, 100 TQFP surface mount, commercial temperature 0°C to 70°C.

$8.76Ref. price · indicative, final on quote
MT58L64L18PT-7.5 datasheet
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Specifications

MT58L64L18PT-7.5 Technical Specifications
ParameterValue
SeriesSYNCBURST™
Interface_typeParallel
Mounting_typeSurface Mount
Operating temperature high0°C to 70°C (TA)
Frame_size1Mbit
Access time4.2 ns
Memory_typeVolatile
Frequency_hz133000000.0
Package_typeBulk
Memory formatSRAM
Product_statusActive
Supply_voltage_v3.135
Memory organization64K x 18

Product details

SYNCBURST SRAM for high-throughput data buffers

The Micron MT58L64L18PT-7.5 is a 1 Mbit synchronous burst SRAM organized 64K x 18, built on the SYNCBURST architecture for pipelined read/write operations at clock rates up to 133 MHz. The 4.2 ns access time sets the window for the memory controller to latch data on the first read access; subsequent burst cycles follow the clock at the full 133 MHz rate. This part is designed for high-bandwidth cache, line buffers, and networking ASIC glue where deterministic latency and no bus-turnaround dead cycles matter.

Supply and temperature: indoor equipment only

Operating from a 3.135 V supply and rated 0°C to 70°C, this SRAM is for commercial-temperature, indoor environments.

Package and footprint: 100 TQFP

Housed in a 100-lead TQFP for surface-mount assembly, the part is a thin quad flat pack.

Frequently asked questions

What is the access time of MT58L64L18PT-7.5?

The access time is 4.2 ns, measured from address assertion to valid data output on the first read cycle.

What are the operating temperature and voltage specifications for MT58L64L18PT-7.5?

Operating temperature range is 0°C to 70°C (commercial grade), and the supply voltage is 3.135 V (nominal 3.3 V rail).

What is the memory organization and package of MT58L64L18PT-7.5?

The memory is organized as 64K words by 18 bits (1 Mbit total), and the package is a 100-lead TQFP for surface-mount assembly.