Logic capacity and I/O count for mid-density glue logic
The OR2C26A3BA352I-DB packs 63,600 gates and 2,304 logic cells (576 CLBs) — a density tier suited for bus bridging, state-machine control, or parallel-interface aggregation where a small CPLD runs out of registers. The 298 user I/O pins give room for wide data buses or multiple peripheral interfaces without external muxing. On-chip block RAM totals 36,864 bits — enough for small FIFO buffers, look-up tables, or coefficient storage in a digital filter. The 4.5 V core supply is a legacy voltage rail, common in ORCA2-era designs; the board's power tree must deliver this rail separately from any 1.2 V or 1.8 V FPGA core supplies used elsewhere. With an industrial temperature range of -40 to 85 °C (ambient), the device is qualified for outdoor telecom cabinets, factory-floor control modules, and engine-bay-adjacent electronics where a commercial-grade part would drift out of spec.
Board-fit and supply posture
The part is supplied in Bulk — loose units, not tape-and-reel — so it is typically handled in prototype or low-volume production runs.