7680 logic cells in a 5x5 mm footprint
The ICE40LP8K-CM121 packs 7680 logic cells and 93 I/O into a 121-ball UCBGA that measures 5x5 mm — the tightest density-to-footprint ratio in the iCE40 LP family. For a portable sensor bridge or a display controller that needs to fit behind a 10 mm board edge, this package saves real estate without sacrificing the logic budget.
93 I/O on a 121-ball array means the outer two rings carry signals while the core balls are mostly VCC and GND. The 0.5 mm pitch demands a 4-layer PCB for reliable fan-out — two-layer boards will struggle to escape the inner rows without via-in-pad. Plan the decoupling caps within 2 mm of the package edge to keep the 1.14-1.26 V core rail clean. The 128 Kbit block RAM (131072 bits total) is organized as 8 Kbit blocks — enough for a 1024x8 FIFO or a line buffer for a 320x240 display. For larger frame buffers, you will need external SRAM or PSRAM on the GPIO.
Industrial temp grade and active lifecycle
Rated -40 to 100 °C junction temperature, this FPGA handles outdoor base stations, engine-bay data loggers, and factory-floor sensor hubs without a heatsink. The 1.14-1.26 V supply is tight — a 1.2 V rail with ±3% regulation keeps the core within spec across the full temp swing.
Where the I/O count lands against siblings
The ICE40LP8K-CM121 (93 I/O) sits between the CM81 (63 I/O) and the CM225 (178 I/O) on the same LP8K die — all three share 7680 logic cells, 128 Kbit RAM, and 960 LABs. The CM121 is the middle option: enough I/O for a parallel LCD interface or a 16-bit data bus plus control signals, without the larger 225-ball package that drives up PCB cost. The HX8K variant (ICE40HX8K-BG121) matches the 93 I/O and 7680 logic cells but runs on a different power profile — the HX series targets higher performance at the cost of higher static power. For battery-operated designs, the LP series remains the lower-power choice.