1280 logic elements, 92 I/O — iCE40 LP family fit
The Lattice ICE40LP1K-CB121 is a low-power FPGA from the iCE40™ LP series, built around 1280 logic elements (160 LABs/CLBs) and 64 Kbit of embedded RAM. The 92 user I/O break out to a 121-ball CSBGA package (6x6 mm) — the ball pitch and footprint are the critical board-level constraint, not the logic density. The core voltage rail is tight — 1.14 V to 1.26 V — which means the on-board regulator or PMIC must hold within ±60 mV of the nominal 1.2 V.
Package footprint — 121-CSBGA board integration
The 121-CSBGA (6x6 mm) is a fine-pitch BGA — the 0.50 mm ball pitch demands a 4-layer PCB minimum for fan-out of the 92 I/O, with microvias or via-in-pad for the inner rows. The supplier device package is the same 121-CSBGA (6x6) as the ICE40LP1K-CM121, so the PCB footprint is identical between the two variants — the only difference is the I/O count (92 vs 95). Surface-mount assembly with a standard reflow profile for lead-free solder (260°C peak) is compatible.