Active production — what it means for the BOM line
The ICE40HX8K-CT256: ROHS3 compliant, no exemptions to track for EU or similar regulated markets.
Logic fabric and memory — 7680 LEs with 128 Kbit block RAM
7,680 logic elements arranged in 960 LABs/CLBs, each LAB containing eight 4-input LUTs and eight flip-flops — the standard iCE40 slice architecture. This density suits glue-logic consolidation, sensor bridging, or display control where a small LUT-based FPGA fits without the overhead of a larger device. 131,072 bits of total block RAM (128 Kbit) distributed across the fabric. Enough for small FIFOs, line buffers for a VGA-resolution display, or coefficient storage for a digital filter — not enough for frame buffers or large packet queues.
206 user I/O — the package drives the board
Core supply is a single rail at 1.14 V to 1.26 V — no separate VCCINT or VCCAUX.
No stock-holding claim — each RFQ is priced fresh.