The GAL22V10D-25LJI is a member of Lattice Semiconductor's GAL®22V10 series — an EEPROM-based programmable logic device (EE PLD) with 10 macrocells, each configurable as registered or combinatorial outputs. The 25 ns tpd(1) max propagation delay sets the speed ceiling for registered paths: at 5V nominal, the internal feedback path from pin to pin through the logic array takes no more than 25 ns, which translates to a maximum clock frequency around 40 MHz in a typical combinatorial-to-registered path.
Package and board-fit considerations
The J-bend leads are surface-mount only; the package footprint is standard for 28-pin PLCC sockets or direct solder to PCB pads. The 0.050-inch (1.27 mm) lead pitch and the PLCC body require a reflow profile compatible with J-bend packages — typically a peak temperature of 220-235°C depending on the solder paste.
Lifecycle reality — obsolete and sourced through independent channels
Lattice Semiconductor has marked the GAL22V10D-25LJI as Obsolete. The part is not available through standard authorized distribution channels.