8 macrocells — right-size the glue logic
The GAL16V8D-25LPI packs 8 macrocells in a 20-pin DIP — enough to replace a handful of 74-series logic gates, a small state machine, or a bus-address decoder without reaching for an FPGA. The EE PLD fabric is non-volatile and instant-on: the configuration is stored on-chip, so the part is live at power-up with no external boot memory or configuration load time.
Through-hole DIP — legacy board fit
The 20-DIP (0.300", 7.62mm) through-hole package is the standard dual-in-line footprint that has been a prototyping and production mainstay for decades. It is rework-friendly, socketable, and mates with 0.100-inch-pitch breadboards and perforated boards. The tube packaging keeps the devices aligned and protected during handling.