MAX II CPLD — instant-on, low-power glue logic
The Intel EPM570ZM100C6N is a MAX® II family CPLD with 570 logic elements and 440 macrocells in a 100-ball TFBGA (6x6 mm) package. It is in-system programmable and operates from a 1.71 V to 1.89 V internal supply, with a maximum pin-to-pin propagation delay of 9 ns. The 76 user I/Os give it enough connectivity for medium-density board-level logic consolidation — address decoding, state machines, or peripheral bridging — without the boot time of an FPGA.
