MAX II CPLD — 570 logic elements, 5.4 ns pin-to-pin
The Intel EPM570GT100I5N is a MAX II series CPLD with 570 logic elements and 440 macrocells, delivering a 5.4 ns propagation delay (tpd1) for combinatorial paths. It is in-system programmable via JTAG, operates from a 1.71 V to 1.89 V internal supply, and provides 76 user I/O in a 100-TQFP package. The industrial temperature grade spans -40°C to 100°C (junction), suiting it for motor drives, outdoor telecom, and factory-floor control logic that runs in non-conditioned enclosures.
5.4 ns tpd — timing budget
5.4 ns pin-to-pin delay (tpd1) is the combinatorial path through one logic level.
