Intel Altera MAX® II CPLD, EPM570GT100C3N, 440 macrocells, 570 logic elements, 76 I/O, 5.4 ns pin-to-pin delay, 1.71 V to 1.89 V core, 0°C to 85°C, 100-TQFP, Tray.
| Parameter | Value |
|---|---|
| Series | MAX® II |
| Mounting | Surface Mount |
| Programmable type | In System Programmable |
| Voltage supply - internal | 1.71V ~ 1.89V |
| Operating temperature | 0°C~85°C(TJ) |
| Package | Tray |
| Number of i (O) | 76 |
| Case | 100-TQFP |
| Number of macrocells | 440 |
| Delay time tpd(1) max | 5.4 ns |
| Number of logic elements (Blocks) | 570 |
The Intel Altera EPM570GT100C3N is a MAX® II CPLD with 570 logic elements, 440 macrocells, and 76 I/O in a 100-TQFP package. Pin-to-pin delay is 5.4 ns; core supply is 1.71 V to 1.89 V.
This is a commercial-temperature part.
The suffix C3N vs C4N indicates a speed grade difference. The C3N carries a 5.4 ns tpd; the C4N is a slower speed bin (typically 6.2 ns). All other specs — density, I/O count, package, supply voltage — are identical.
It belongs to the MAX® II series and comes in a 100-TQFP package supplied in Tray format.