Intel MAX® II CPLD, EPM1270M256I5N, 980 macrocells, 1270 logic elements, 212 I/O, 6.2 ns tpd(1) max, 2.5V/3.3V internal supply, -40°C to 100°C (TJ), 256-TFBGA, tray.
| Parameter | Value |
|---|---|
| Series | MAX® II |
| Mounting | Surface Mount |
| Programmable type | In System Programmable |
| Voltage supply - internal | 2.5V, 3.3V |
| Operating temperature | -40°C~100°C(TJ) |
| Package | Tray |
| Number of i (O) | 212 |
| Case | 256-TFBGA |
| Number of macrocells | 980 |
| Delay time tpd(1) max | 6.2 ns |
| Number of logic elements (Blocks) | 1270 |
The Intel EPM1270M256I5N is a MAX® II family CPLD with 980 macrocells and 1270 logic elements, in-system programmable via JTAG. It provides 212 user I/O in a 256-ball MBGA (11x11 mm) package, with a pin-to-pin propagation delay of 6.2 ns maximum.
The EPM1270M256I5N sits above the EPM240F100C5N in the MAX II density stack. The EPM240 packs 192 macrocells and 80 I/O in a 100-pin TQFP; the EPM1270 provides 980 macrocells and 212 I/O.
The manufacturer lists it as Active, but a lifecycle_stage flag of eol_hot suggests the part is approaching end-of-life or in a last-time-buy window. We source it through independent channels; request a quote to confirm current availability.
980 macrocells, 1270 logic elements, 212 I/O, 6.2 ns tpd(1) max, 2.5V/3.3V internal supply, -40°C to 100°C junction temperature, 256-ball MBGA (11x11 mm) package, in-system programmable.
256-ball MBGA (11x11 mm), 0.5 mm ball pitch, surface-mount. The supplier device package is 256-MBGA. Pinout details are in the MAX II device family datasheet.