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Intel 10M50DAF672I7G — FPGA / CPLD & Programmable Logic

Intel 10M50DAF672I7G MAX 10 FPGA, 50K LE, 500 I/O

MPN10M50DAF672I7G
Active

Intel MAX® 10 FPGA, 10M50DAF672I7G, 50 000 logic elements, 500 I/O, 1 677 312 total RAM bits, 1.15V–1.25V core supply, 672-FBGA (27x27 mm), -40 to 100°C junction temperature, Tray.

$255.9700Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

10M50DAF672I7G specifications
ParameterValue
SeriesMAX® 10
MountingSurface Mount
Supply voltage1.15V ~ 1.25V
Operating temperature-40°C ~ 100°C (TJ)
PackageTray
Number of i (O)500
Case672-BGA
Total RAM bits1677312
Number of LABs (CLBs)3125
Number of logic elements (Cells)50000

Product details

What the 10M50DAF672I7G delivers on the board

Because it is a junction limit, forced airflow or a heatsink may be needed if the board runs near the upper bound in still air.

500 I/O — what the pin count buys you

With 500 I/O, this part can interface to a wide parallel bus without needing a larger package. The 672-FBGA footprint is 27x27 mm.

Frequently asked questions

What is the closest replacement or equivalent for 10M50DAF672I7G?

The 10M40DAF672I6G is a pin-compatible alternative in the same 672-FBGA package with 500 I/O, 40 000 logic elements, and a faster -6 speed grade. The 10M40DAF672I7G is a slower -7 speed grade with the same 40 000 LE density.

What is the datasheet for 10M50DAF672I7G?

The datasheet is Intel's MAX 10 FPGA Device Datasheet, which covers the full family including the 10M50DAF672I7G. It details the logic array, block RAM, I/O standards, configuration, and electrical characteristics.

Does 10M50DAF672I7G support 1.8V I/O standards?

The MAX 10 family supports multiple I/O voltage standards including 1.8V, 2.5V, and 3.3V on the I/O banks. The 1.8V operation is available on the appropriate VCCIO pins per bank.

Does 10M50DAF672I7G support LVDS?

The MAX 10 family supports LVDS on dedicated I/O banks. The 10M50DAF672I7G with 500 I/O includes LVDS-capable pairs, though the exact number depends on the bank assignment and adjacent I/O usage.