BJT voltage divider bias calculator
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Bias design
Results
R1 — divider upper
R1 = R_B·Vcc ÷ Vb
R2 — divider lower
R2 = R_B·Vcc ÷ (Vcc − Vb)
Emitter resistor (Re)
Re = Ve ÷ Ic
Collector resistor (Rc)
Rc = (Vcc − Vce − Ve) ÷ Ic
Divider current
Vcc ÷ (R1 + R2) — ~10× the base current
Operating point Ic
Simulated with nearest-E24 parts
Operating point Vce
Simulated with nearest-E24 parts
β sensitivity
Ic holds within ±10%| β | Ic (mA) | Vce (V) | vs nominal |
|---|---|---|---|
| 100 | 4.1 | 6.08 | +8.56% |
| 200 | 4.49 | 5.54 | 0% |
| 400 | 4.71 | 5.22 | +4.91% |
Ic stays within ±10% when β is halved or doubled — the divider bias is doing its job.
About the model
The four-resistor network sets a Thevenin base voltage with R1 and R2 while Re degenerates the emitter. Because the divider current is roughly ten times the base current (R_B = β·Re/10), the base sits near a fixed voltage and Ic ≈ Ve/Re barely moves with β — the classic trade-off between bias stability and the power the divider wastes. Rc is then sized from the headroom left between Vcc, Vce and Ve.
Real parts spread β far wider than the datasheet typical, so prototypes should always be measured. The operating point above is simulated with the nearest E24 resistors.
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