The RN4906FE,LF(CT packs one NPN and one PNP pre-biased transistor into a single SOT-563 package, each with built-in bias resistors — R1 (base) at 4.7 kΩ and R2 (emitter-base) at 47 kΩ. That resistor network eliminates two external resistors per channel, saving board space and reducing pick-and-place count on high-density digital output or driver stages. The 100 mW power dissipation ceiling means the total heat from both junctions must stay under that limit; at 5 mA per channel the margin is comfortable, but running both channels near 100 mA simultaneously will exceed the package thermal budget. Minimum DC current gain of 80 at 10 mA collector current and 5 Vce means the base drive from a GPIO pin (typically 1-3 mA through the internal 4.7 kΩ resistor) is enough to saturate the output. The 300 mV Vce saturation at 250 µA base current and 5 mA collector confirms the transistor switches cleanly into saturation for low-side or high-side switching.
The surface-mount package suits automated assembly lines; the small size demands careful solder paste volume control to avoid bridging between the tight-pitch pins.
Active production and compliance
Listed as Active — current production from Toshiba Semiconductor. ROHS3 compliant, no exemptions noted.
