3A peak gate drive — sizing the MOSFET load
Its 3A peak source and sink current determines the total gate charge it can push in.
120V bootstrap ceiling — bus voltage limit
The high-side bootstrap pin is rated to 120 V maximum. That is the absolute DC bus voltage the high-side driver can reference — beyond it the bootstrap diode and level-shifter breakdown.
8 ns rise, 7 ns fall — layout and ringing
Rise and fall times are 8 ns and 7 ns typical. Fast edges minimise the dead-time overlap region where both FETs conduct, but they also excite the gate-loop inductance. The 8-SOIC package has ~2 nH of bond-wire inductance per pin; the PCB trace from driver output to MOSFET gate should stay under 10 mm to keep the resonant rise below the MOSFET threshold.
Supply voltage range is 8 V to 17 V. The logic input thresholds are 3 V (VIL) and 8 V (VIH) — compatible with 5 V and 3.3 V logic families, but a 3.3 V PWM signal at 3.0 V logic-high is marginal; a level-shifter or pull-up to 5 V is recommended for reliable turn-on. The two channels are independent and non-inverting, so each input directly controls one output without cross-coupling.
Temperature grade — industrial and automotive environments
The 140°C ceiling covers under-hood automotive and industrial motor-drive enclosures where ambient heat plus self-heating from the 3A gate-drive pulses push die temperature. The 8-SOIC package has a junction-to-ambient thermal resistance around 120°C/W; at 140°C ambient the allowable power dissipation is near zero, so forced airflow or a larger copper area on the PCB is needed for sustained high-frequency switching.