PSRR profile and noise-sensitive rail fit
The TPS79501DRBR delivers 59 dB of PSRR at 100 Hz, rolling off to 39 dB at 100 kHz. For an analog front-end powered from a switching regulator, the 100 kHz PSRR figure tells you how much ripple couples through at the converter's fundamental — 39 dB attenuation means roughly 1% of the 100 kHz ripple amplitude appears at the LDO output. A post-LDO RC filter ahead of the ADC reference pin cleans up the residual. Rated for 500 mA continuous output, this LDO suits moderate-current rails — sensor supplies, MCU analog domains, or RF VCO bias lines that draw 100-400 mA. The 385 µA quiescent current (Iq) is the regulator's own draw at no load; it matters for battery-powered gear where the LDO stays enabled during sleep.
Protection set and operating envelope
Built-in over-current, over-temperature, reverse polarity, and under-voltage lockout (UVLO) protection. The UVLO threshold prevents the output from tracking a sagging input rail into an undefined state — the regulator stays off until the input rises above the UVLO release point. Reverse polarity protection blocks damage when the supply is accidentally reversed, a common bench hazard during prototyping.