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Texas Instruments TPS75401QPWP — Power Management (PMIC / Gate Driver)

TPS75401QPWP LDO, 2A adjustable, 60dB PSRR, HTSSOP-20

MPNTPS75401QPWP
End of Life

Texas Instruments TPS75401QPWP adjustable LDO regulator, 2A output, 1.5V to 5V adjustable output, 60dB PSRR at 100Hz, 125µA quiescent current, 20-PowerTSSOP (HTSSOP) package, -40°C to 125°C.

$6.41Ref. price · indicative, final on quote
Packaging20-PowerTSSOP (0.173", 4.40mm Width)
RoHSROHS3 Compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TPS75401QPWP specifications
ParameterValue
Output typeAdjustable
MountingSurface Mount
Voltage - input5.5V
Voltage - output5V
Voltage - output (Min (Fixed))1.5V
Output current2A
Current - quiescent125 µA
Operating temperature-40°C ~ 125°C
PSRR60dB (100Hz)
PackageTube
Case20-PowerTSSOP (0.173\", 4.40mm Width)
Control featuresEnable, Power Good, Reset Output
Protection featuresOver Current, Over Temperature, Reverse Polarity
Number of regulators1
Output configurationPositive

Product details

2A adjustable LDO — PSRR and thermal reality

The TPS75401QPWP is a single-output positive adjustable LDO from Texas Instruments, rated for 2A continuous output current with a dropout voltage that depends on the load and junction temperature — the PowerTSSOP package's exposed thermal pad is the path to get that current out without hitting the thermal limit. PSRR is specified at 60dB at 100Hz — this is a line-frequency rejection number, not a wideband spec; above a few kilohertz the PSRR rolls off, so upstream switching noise above 100kHz passes through unless filtered ahead of the LDO. Quiescent current is 125 µA typical — low enough for always-on rails in battery-backed industrial controllers, but not in the micropower class; the Iq is the standing load on the input when the output is unloaded.

Input range, adjustable output, and protection set

Input voltage range goes up to 5.5V maximum — this is a 5V-rail LDO, not a wide-VIN part; the adjustable output spans 1.5V to 5V, set by an external resistor divider on the feedback pin. Control features include an Enable pin for sequencing, a Power Good flag, and a Reset Output — the reset output is a sequenced open-drain signal that tracks the output regulation, useful for FPGA or processor core rail sequencing.

Frequently asked questions

What does the 60dB PSRR at 100Hz mean for my design?

The 60dB PSRR at 100Hz means the LDO attenuates 100Hz ripple on the input by 60dB — a 100mV ripple at 100Hz becomes 0.1mV at the output. This is a line-frequency rejection figure; above a few kilohertz the PSRR drops, so upstream switching noise above 100kHz needs additional filtering ahead of the LDO.

What protection features does the TPS75401QPWP include?

The TPS75401QPWP includes over-current, over-temperature, and reverse polarity protection — the reverse polarity protection is notable because it saves an external Schottky diode on the input rail.