Active production — what it means for a BOM line
The TPS728180285YZUT: ROHS3 compliant per the listing, so no lead-exemption paperwork is needed for EU or China RoHS declarations.
PSRR profile and the noise rejection decision
PSRR is specified at 65 dB at 100 Hz, rolling off to 40 dB at 100 kHz. This means the regulator rejects line-frequency ripple well — a 100 Hz rectified sine wave on the input is attenuated by a factor of ~1800 — but above 10 kHz the rejection drops to about 100×, so upstream switching noise from a buck converter or charge pump will pass through unless a ferrite bead or LC filter is placed ahead of the LDO. For a sensor front-end or audio codec supply where the noise floor matters at 20 kHz and above, the 40 dB PSRR at 100 kHz means the LDO alone is not enough — the input rail must be clean to begin with.
200 mA output with dropout headroom
Rated 200 mA continuous output with a maximum dropout voltage of 0.4 V at full load. Quiescent current is 80 µA typical, rising to 120 µA maximum supply current. In a battery-powered design drawing 10 µA in sleep, the regulator's own Iq dominates the sleep budget — a load-switch or enable pin to shut down the LDO during sleep extends battery life.
Industrial temperature range and package constraints
The 125°C upper limit means the junction temperature can reach 125°C without derating the output current, but the DSBGA package's thermal resistance (not specified here) will limit how much power can be dissipated at that ambient. Housed in a 5-bump DSBGA (5-UFBGA) package, 0.4 mm pitch typical for this class. The small footprint saves board area but requires a controlled solder-paste stencil and X-ray inspection for voiding — rework is difficult without a hot-air station and a microscope.
Protection features and enable control
Built-in over-current, over-temperature, and under-voltage lockout (UVLO) protection. The UVLO threshold prevents the output from sourcing current when the input rail drops below the regulation headroom — useful in a multi-rail power-up sequence where the 1.8 V or 2.85 V rail must not back-feed into a pre-biased load. An enable pin is provided for sequencing or shutdown. The fixed output configuration means no external feedback divider is needed — the 1.8 V and 2.85 V rails are set internally.