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Texas Instruments TPS3851G33EDRBR — Power Management (PMIC / Gate Driver)

TPS3851G33EDRBR Simple Reset/Power-On Reset, 3.3V Threshold

MPNTPS3851G33EDRBR
Active

Texas Instruments TPS3851G33EDRBR, Simple Reset/Power-On Reset, Active Low, Open Drain or Open Collector, 170ms Minimum Reset Timeout, 3.3V Threshold, -40°C~125°C, 8-VDFN Exposed Pad, Surface Mount.

$1.9500Ref. price · indicative, final on quote
Texas Instruments TPS3851G33EDRBR datasheet (PDF)
Packaging8-VDFN Exposed Pad
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TPS3851G33EDRBR specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold3.3V
Number of voltages monitored1
Operating temperature-40°C~125°C(TJ)
ResetActive Low
OutputOpen Drain or Open Collector
PackageTape & Reel (TR); Cut Tape (CT)
Reset timeout170ms Minimum
Case8-VDFN Exposed Pad

Product details

Package and mounting — 8-SON (3x3) for space-constrained boards

The TPS3851G33EDRBR is supplied in an 8-SON (3x3) package with an exposed pad for thermal dissipation. The small footprint suits designs where board area is at a premium, such as sensor modules, compact motor controllers, or portable instruments. The exposed pad must be soldered to a thermal land on the PCB to achieve the rated thermal performance. The part is surface-mount only; no through-hole variant exists.

Lifecycle and sourcing — active production, no LTB risk

The TPS3851G33EDRBR carries an active lifecycle status. The part is ROHS3 compliant.

Frequently asked questions

What is the exact reset timeout of TPS3851G33EDRBR?

The reset timeout is 170ms minimum. This is the guaranteed minimum time the reset output stays active after the monitored voltage rises above the threshold.

Is TPS3851G33EDRBR compatible with 3.3V logic?

Yes. The part monitors a 3.3V rail, and its open-drain output with a pull-up to 3.3V is directly compatible with 3.3V logic inputs on MCUs, FPGAs, and other digital ICs.

Does TPS3851G33EDRBR have an open drain output?

Yes, the output is open drain (open collector). An external pull-up resistor is required for the output to produce a logic-high level when reset is not asserted.

Is TPS3851G33EDRBR active low or active high?

The reset output is active low. The reset signal goes low when the monitored voltage falls below the threshold and stays low for the 170ms timeout after recovery.

What is the difference between TPS3851G33EDRBR and TPS3851G33DRBR?

The difference is packaging and tape/reel format. The 'EDRBR' suffix indicates a specific reel and cut-tape configuration; the underlying die and electrical specifications are identical. Both are the same base product TPS3851.

When sourcing TPS3851G33EDRBR, what's the closest functional second-source?

The TLV803EA29VDBZR is a functional peer with a similar active-low, open-drain output and 130ms minimum reset timeout, but it monitors a 1.0V threshold, not 3.3V. For a 3.3V rail, the TPS3851G33EDRBR is the correct threshold; the TLV803 series would require a different threshold variant.