Texas Instruments TPS3838J25DBVTG4, Simple Reset/Power-On Reset, Active Low, Open Drain or Open Collector, 2.25V threshold, 10ms min reset timeout, SOT-23-5, -40°C to 85°C.
| Parameter | Value |
|---|---|
| Type | Simple Reset/Power-On Reset |
| Mounting | Surface Mount |
| Voltage - threshold | 2.25V |
| Number of voltages monitored | 1 |
| Operating temperature | -40°C~85°C(TA) |
| Reset | Active Low |
| Output | Open Drain or Open Collector |
| Package | Tape & Reel (TR) |
| Reset timeout | 10ms Minimum |
| Case | SC-74A, SOT-753 |
The active-low, open-drain output stays low for a minimum of 10 ms after the rail returns above threshold, giving the downstream processor or FPGA time to stabilize its internal state before release.
The SOT-23-5 package (SC-74A, SOT-753) occupies minimal board area and uses a standard five-pin land pattern, making it a straightforward drop-in for space-constrained designs.
Design engineers need the full datasheet to validate pinout, timing, and electrical specs.
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Engineers must confirm voltage monitoring level and timing match their circuit requirements.