The active-low, open-drain output holds the reset for a minimum of 120 ms after the rail recovers, giving the downstream processor or FPGA time to initialize. This is a straightforward supervisor — no watchdog, no manual reset input — just the fundamental power-good handshake for a 3.3 V digital rail.
That means Texas Instruments has announced end-of-life; the final purchase window is open but closing. If this supervisor is already qualified on a board, now is the time to secure lifetime-buy quantities or qualify a drop-in replacement. For production continuity, the BOM should flag this line for a last-time-buy calculation.
Open-drain output and level translation
The open-drain output lets the reset pull-up resistor connect to a different voltage than the monitored 3.3 V rail.
