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Texas Instruments TPS3707-25DGN — Power Management (PMIC / Gate Driver)

TPS3707-25DGN Simple Reset/Power-On Reset IC

MPNTPS3707-25DGN
Active

Texas Instruments TPS3707-25DGN Simple Reset/Power-On Reset IC, Active High/Active Low, Push-Pull Output, 2.25V Threshold, 140ms Reset Timeout, -40°C to 85°C, 8-HVSSOP.

$2.9900Ref. price · indicative, final on quote
Texas Instruments TPS3707-25DGN datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

TPS3707-25DGN specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold2.25V
Number of voltages monitored1
Operating temperature-40°C~85°C(TA)
ResetActive High/Active Low
OutputPush-Pull, Totem Pole
PackageTube
Reset timeout140ms Minimum
Case8-TSSOP, 8-MSOP (0.118\", 3.00mm Width) Exposed Pad

Product details

2.25 V threshold, dual-assertion reset supervisor

The TPS3707-25DGN: The push-pull outputs drive directly into the reset inputs of MCUs, DSPs, or FPGAs without an external pull-up resistor.

Industrial temp range and package thermal path

The 8-TSSOP/MSOP footprint (0.118" body width, 3.00 mm) is a common supervisor layout; the exposed pad adds a centre-land that some standard TSSOP footprints lack.

The base product number TPS3707 covers a family of threshold-voltage options; the -25 suffix selects the 2.25 V trip point. The part ships in Tube, and the surface-mount mounting type matches standard pick-and-place assembly.

Frequently asked questions

Does the TPS3707-25DGN assert reset high or low?

Both. The TPS3707-25DGN provides an active-high reset output and an active-low reset output. This lets it drive processors that require a logic-high reset signal and those that need a logic-low reset from the same supervisor IC.

What is the reset timeout of the TPS3707-25DGN?

The reset timeout is 140 ms minimum. After the monitored voltage rises above the 2.25 V threshold, the reset outputs hold the asserted state for at least 140 ms before releasing. This guarantees the downstream device's power supply and clock oscillator have settled before the processor starts.