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Texas Instruments TPS3703A4110DSER — Power Management (PMIC / Gate Driver)

TI TPS3703A4110DSER Window Supervisor, 1.1V Threshold

MPNTPS3703A4110DSER
Active

Texas Instruments TPS3703A4110DSER, Simple Reset/Power-On Reset, Active Low, Open Drain or Open Collector, 140ms Minimum Reset Timeout, 1.1V Threshold, -40°C~125°C(TJ), Surface Mount, 6-WFDFN (6-WSON 1.5x1.5).

$2.1200Ref. price · indicative, final on quote
Packaging6-WFDFN
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TPS3703A4110DSER specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold1.1V
Number of voltages monitored1
Operating temperature-40°C~125°C(TJ)
ResetActive Low
OutputOpen Drain or Open Collector
PackageTape & Reel (TR); Cut Tape (CT)
Reset timeout140ms Minimum
Case6-WFDFN

Product details

1.1V window supervisor for tight-rail monitoring

The Texas Instruments TPS3703A4110DSER is a high-accuracy window supervisor that monitors a single voltage rail at a 1.1V threshold, asserting an active-low reset when the supply goes outside the window. The open-drain output stays low for a minimum 140ms reset timeout after the voltage returns inside the window, giving the downstream rail time to stabilize before the processor releases from reset. It comes in a 6-WSON package measuring 1.5x1.5 mm — small enough to tuck next to the FPGA or MCU supply pin without eating board space.

Window detection — catches both under- and over-voltage

Unlike a simple undervoltage reset, the TPS3703A4110DSER monitors a window around the 1.1V threshold. If the monitored rail dips below or rises above the window boundaries, the output pulls low. This matters for low-voltage cores (1.0V to 1.2V) where a small overvoltage can damage the silicon just as fast as an undervoltage can cause logic errors. A window supervisor gives the system a clean reset before the rail leaves the safe operating zone.

The pad is also the ground return for the device, so the thermal vias double as low-impedance ground connections.

Frequently asked questions

What is the exact reset timeout of TPS3703A4110DSER?

The reset timeout is 140ms minimum. After the monitored voltage returns inside the window, the open-drain output stays low for at least 140ms before releasing.

Can TPS3703A4110DSER be used for 1.1V monitoring in FPGA applications?

Yes. The 1.1V threshold is a common core voltage for FPGAs and SoCs in the 1.0V to 1.2V range. The window supervisor catches both under- and over-voltage conditions, which protects the FPGA core from out-of-spec rails that could cause latch-up or logic corruption.

What is the typical application for TPS3703A4110DSER?

It is used as a voltage supervisor for low-voltage digital cores (FPGA, ASIC, MCU) in industrial, automotive, and telecom systems where the -40°C to 125°C temperature range is required. The window detection makes it suitable for rails that need both under- and over-voltage protection.

How to use TPS3703A4110DSER as a window detector?

Connect the monitored rail to the VDD pin. The internal window comparator checks the voltage against the 1.1V threshold with built-in upper and lower window boundaries. When the rail is outside the window, the open-drain output pulls low. The output stays low for 140ms minimum after the rail returns inside the window, then releases. No external programming resistors are needed — the window thresholds are fixed by the device.