Battery backup supervisor with a 4.55 V trip point
The TPS3619-50DGKRG4: It is built for systems where a lithium cell or supercap must hold the SRAM or CMOS clock alive during a main-supply dropout.
Reset output and timeout — what the 60 ms buys you
The reset output is active-low, push-pull, totem pole — no external pull-up needed, and it drives the processor reset pin directly. After the supply rises above the threshold, the output holds reset low for at least 60 ms, giving the oscillator and PLL time to stabilise before the core fetches its first instruction.