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Texas Instruments TPS3613-01DGS — Power Management (PMIC / Gate Driver)

TPS3613-01DGS Battery Backup Supervisor IC – TI Active

MPNTPS3613-01DGS
Active

Texas Instruments TPS3613-01DGS, Battery Backup Circuit, 1-channel supervisor, dual reset (Active High/Active Low), push-pull output, 60 ms minimum reset timeout, -40°C to 85°C, 10-VSSOP

$6.0300Ref. price · indicative, final on quote
Packaging10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TPS3613-01DGS specifications
ParameterValue
TypeBattery Backup Circuit
MountingSurface Mount
Voltage - thresholdAdjustable/Selectable
Number of voltages monitored1
Operating temperature-40°C~85°C(TA)
ResetActive High/Active Low
OutputPush-Pull, Totem Pole
PackageTube
Reset timeout60ms Minimum
Case10-TFSOP, 10-MSOP (0.118\", 3.00mm Width)

Product details

Battery-backup supervisor with dual reset outputs

The TPS3613-01DGS is a Texas Instruments battery backup supervisor IC that monitors a single supply rail and asserts both active-high and active-low reset signals when the voltage drops below a programmable threshold. The push-pull outputs drive directly into the reset and power-fail inputs of an MCU or FPGA without external pull-ups.

Package and supply-chain posture

Tube delivery is standard; reel quantities are available through the supply chain.

Threshold flexibility and reset timing

The voltage threshold is adjustable or selectable, allowing the designer to set the trip point to match the nominal rail voltage of the supervised device. The 60 ms minimum reset timeout ensures the downstream processor sees a clean power-good signal even on a slow-ramping supply. The push-pull, totem-pole output stage drives both active-high and active-low reset lines without external components, saving board space and reducing BOM count compared to open-drain alternatives that require pull-up resistors.

Frequently asked questions

What is the reset timeout for TPS3613-01DGS?

The reset timeout is 60 ms minimum. This is the guaranteed hold-off period after the supply rises above the threshold, ensuring the supervised processor or FPGA sees a stable rail before release.