1.14V threshold supervisor for low-voltage rails
The open-drain output lets you pull up to any logic voltage up to the absolute maximum of the device, making it straightforward to interface with 1.8V, 2.5V, or 3.3V logic without a level shifter.
100ms reset timeout — covers power-up settling
The reset output holds low for a minimum of 100ms after the monitored voltage rises above the threshold. This gives the core supply and oscillator time to stabilise before the processor or FPGA starts executing code. The timeout is fixed — no external capacitor needed.
