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Texas Instruments TMS6787-20N — Memory (DRAM / SRAM / Flash / EEPROM)

TMS6787-20N SRAM, 64Kx1, 20 ns, Active – Sourced to Order

MPNTMS6787-20N
Active

Standard SRAM, 64Kx1, 20 ns access time, Bulk package, active lifecycle.

$6.57Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

TMS6787-20N Technical Specifications
ParameterValue
Series*
Package_typeBulk
Product_statusActive

Product details

What is the TMS6787-20N?

The TMS6787-20N is a standard SRAM organized as 64Kx1 with a 20 ns access time. It is a fast, single-bit-wide memory for applications that need tight timing margins—cache tag stores, FIFO buffers, or glue logic in legacy bus systems. The 20 ns access time means it can keep up with a 50 MHz bus without wait states, which is the headline spec that decides fit for a timing-critical design.

Lifecycle and compliance

RoHS compliance is not explicitly stated in the available records; verify with your compliance team if the application requires RoHS certification.

Package and handling

For a field-service swap, the orientation is straightforward—standard DIP or SOIC footprint depending on the variant; the 20 ns speed grade is the same across package options. Keep it in the bag until placement; no special bake profile is documented, but standard MSL precautions apply.

Frequently asked questions

What is the access time of the TMS6787-20N?

The access time is 20 ns.

What is the TMS6787-20N's memory organization?

It is organized as 64K words by 1 bit (64Kx1). That means it stores 65,536 bits, accessed one bit at a time. It is a good fit for wide-word memory systems where you stack multiple devices to build the data bus width you need.