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Texas Instruments TLV7113333DDSER — Power Management (PMIC / Gate Driver)

Texas Instruments TLV7113333DDSER Dual 200mA LDO, PSRR 80dB

MPNTLV7113333DDSER
End of Life

Texas Instruments TLV7113333DDSER dual-output LDO regulator, 3.3V fixed, 200mA per channel, 6-WFDFN / 6-WSON (1.5x1.5mm), surface mount, active.

$0.72Ref. price · indicative, final on quote
Packaging6-WFDFN
RoHSROHS3 Compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TLV7113333DDSER specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Voltage - input5.5V
Voltage dropout0.2V @ 200mA, 0.2V @ 200mA
Voltage - output (Min (Fixed))3.3V, 3.3V
Output current200mA
Current - quiescent110 µA
Operating temperature-40°C ~ 125°C (TJ)
PSRR80dB ~ 50dB (10Hz ~ 100kHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case6-WFDFN
Control featuresEnable
Protection featuresOver Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
Number of regulators2
Output configurationPositive

Product details

Dual 3.3V rail in a 1.5x1.5 mm WSON

The TLV7113333DDSER is a dual-output low-dropout regulator from Texas Instruments, delivering two independent 3.3 V fixed outputs at 200 mA each from a single 5.5 V max input rail. Housed in a 6-WSON package measuring just 1.5 mm × 1.5 mm, it fits into tight RF front-end or sensor-interface layouts where board space is the binding constraint and a separate analog/digital supply split is needed.

PSRR across the audio band — what the curve tells you

Power-supply rejection ratio starts at 80 dB at 10 Hz and rolls off to 50 dB by 100 kHz. This means the regulator attenuates 100 mV of 10 Hz ripple on the input to roughly 10 µV at the output, but at 100 kHz the same ripple passes through at about 300 µV — still useful for keeping switching-regulator noise off an analog supply, but the upstream filter needs to knock down the high-frequency content before the LDO. Below that, the PSRR figure also degrades as the pass transistor enters the linear region.

Industrial temp range and protection suite

Built-in protection includes over-current, over-temperature, short-circuit, and under-voltage lockout. The UVLO threshold prevents the output from turning on until the input rail is high enough to maintain regulation — avoids brownout glitches on power-up.

Frequently asked questions

What is the PSRR of TLV7113333DDSER?

PSRR is 80 dB at 10 Hz, rolling off to 50 dB at 100 kHz. This curve means the LDO provides strong rejection of low-frequency ripple but passes more high-frequency noise — pair it with a low-ESR output capacitor and keep the upstream switching frequency below 100 kHz for best results.

What package does TLV7113333DDSER use?

6-WSON (1.5 mm × 1.5 mm), also listed as 6-WFDFN. The exposed pad on the bottom side must be soldered to the PCB ground plane for thermal dissipation — the RθJA depends on the copper area under the pad.

How can I order TLV7113333DDSER or check availability?

Submit a request with your target quantity and delivery window.