8 MHz core — timing budget for low-power designs
8 MHz is the maximum core clock. For low-power applications, the clock can be divided down or the device placed in sleep modes between processing events.
2 KB Flash and 128 B RAM — firmware fit check
Program memory is 2 KB (organized as 2K x 8 plus 256 bytes for info storage). That is a tight fit for compiled C code with a small real-time kernel; hand-tuned assembly or a minimal state machine fits comfortably. The 128-byte RAM is the hard limit for stack depth and global variables — watch for stack overflow in interrupt-heavy designs. The Flash is in-system programmable via the JTAG/SBW interface, so field updates are possible if the bootloader fits.
Lifecycle and sourcing
End-of-life (hot) lifecycle status. Manufacturer has issued a last-time-buy notice; production is winding down. For existing BOM lines, we source this part through independent distribution channels.