12 MHz clock and the ADC timing budget
The MSP430AFE252IPW: At 12 MHz the core runs the two 24-bit sigma-delta converters and the SPI or UART. The ADC conversion rate is tied to the modulator clock derived from the internal oscillator.
Active lifecycle and sourcing posture
The product status is Active. The part is sourced and quoted to order against an RFQ through independent distribution; availability and current pricing are confirmed at quote time.
What the dual 24-bit ADC means for the BOM
Two 24-bit sigma-delta converters on a single die eliminate an external ADC and the associated SPI isolator or level shifter. Each channel can be configured for differential inputs, which pairs directly with a shunt or a current transformer in a power-monitoring front end. The 11 general-purpose I/O are enough to drive a small LCD segment, a few LEDs, and a pushbutton, but not a parallel bus or a key matrix—plan the pin allocation before layout.