Jitter cleaning for high-speed converter clocks
The LMK04805BISQ/NOPB is a PLLatinum jitter cleaner from Texas Instruments, designed to reduce phase noise on a reference clock before distribution to ADCs, DACs, or FPGA transceivers. Its 1.536 GHz maximum output frequency covers the sampling clock range for most high-speed converters and SERDES interfaces. With a 2:14 input-to-output ratio, the device accepts two reference inputs and generates up to fourteen cleaned clock outputs. All I/O pins support LVCMOS, LVDS, and LVPECL levels, so the same IC can drive a mixed-signal board's entire clock tree without external level translators.
Supply rails and temperature grade
The part operates from a 3.15 V to 3.45 V supply rail, a narrow window that demands a clean, regulated source — a 3.3 V LDO with ±1% tolerance keeps the PLL's VCO in spec. The 0.5 mm pitch demands careful solder-paste stencil design for void-free reflow.