Dual PLL jitter cleaner for 1.536 GHz clock trees
The LMK04803BISQE/NOPB is a dual PLL jitter cleaner from TI's PLLatinum™ series, designed to clean up noisy reference clocks and generate low-jitter outputs up to 1.536 GHz. It accepts LVCMOS, LVDS, or LVPECL inputs and provides the same output types across fourteen clock outputs from two reference inputs. The 2:14 input-to-output ratio means two reference clocks feed fourteen individually configurable outputs — useful for distributing a clean clock across multiple ADC/DAC channels or FPGA banks without adding external fan-out buffers.
1.536 GHz max output with 3.15V–3.45V supply
The maximum output frequency of 1.536 GHz covers the common clock rates for JESD204B ADCs and high-speed serial interfaces. The supply voltage range of 3.15V to 3.45V is a tight ±5% around 3.3V — the board's 3.3V rail must be clean and well-regulated, not a generic buck output.