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Texas Instruments LMK04133SQ/NOPB — Clock & Timing ICs

LMK04133SQ/NOPB PLLatinum Clock Jitter Cleaner, 1.08 GHz

MPNLMK04133SQ/NOPB
Active

Texas Instruments PLLatinum™ Clock Jitter Cleaner, LMK04133SQ/NOPB, PLL Yes, Input LVCMOS/LVDS/LVPECL, Output LVCMOS/LVDS/2VPECL/LVPECL, 1.08 GHz max, 48-WFQFN Exposed Pad.

$6.6525Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LMK04133SQ/NOPB specifications
ParameterValue
SeriesPLLatinum™
MountingSurface Mount
Supply voltage3.15V ~ 3.45V
Frequency - max1.08GHz
Operating temperature-40°C~85°C
PLLYes
InputLVCMOS, LVDS, LVPECL
OutputLVCMOS, LVDS, 2VPECL, LVPECL
PackageTape & Reel (TR)
Case48-WFQFN Exposed Pad
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output2:6
Differential - Input:OutputYes/Yes

Product details

1.08 GHz PLL with jitter-cleaning core

The LMK04133SQ/NOPB is a PLLatinum™ frequency synthesizer with an integrated PLL (Yes) that reaches a maximum output frequency of 1.08 GHz (cites:,). This is not a simple fanout buffer — the PLL loop filters phase noise from the reference clock, making this part suitable for cleaning up a noisy oscillator before it reaches an ADC, DAC, or SerDes reference input. The device accepts LVCMOS, LVDS, or LVPECL reference inputs and can deliver LVCMOS, LVDS, 2VPECL, or LVPECL outputs (cites:,). That flexibility means the same BOM position can bridge a single-ended crystal reference to a differential high-speed ADC clock input without an additional level translator.

2:6 clock tree and supply tolerance

With a 2:6 input-to-output ratio, two independent clock inputs can be selected and distributed to six outputs (cites:). This supports redundant reference architectures — if the primary oscillator drifts, the PLL can switch to a secondary reference without a board respin. The supply rail is specified at 3.15 V to 3.45 V, a tight 5% window (cites:). The board regulator must hold this rail within tolerance because PLL phase noise degrades with supply ripple; a clean 3.3 V LDO with PSRR above 60 dB at the PLL loop bandwidth is the typical companion.

The base product number is LMK04133 (cites:), and the NOPB suffix indicates lead-free / RoHS-compliant finish.

Frequently asked questions

What is the maximum output frequency of LMK04133SQ/NOPB?

The LMK04133SQ/NOPB has a maximum output frequency of 1.08 GHz (cites:). This ceiling covers most high-speed ADC/DAC clocking and SerDes reference applications.

What signal types does the LMK04133SQ/NOPB support on its inputs and outputs?

The inputs accept LVCMOS, LVDS, or LVPECL; the outputs can be configured as LVCMOS, LVDS, 2VPECL, or LVPECL (cites:,). This eliminates the need for external level translators when interfacing between single-ended and differential clock domains.